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Silc, Jurij; Robic, Borut; Ungerer, Theo:
Processor Architecture
From Dataflow to Superscalar and Beyond
Preis: 69,50 Euro
Auflage: 1. Aufl.
Verlag: Springer-Verlag Berlin Heidelberg Berlin
Erscheinungsdatum: 06/1999
Seiten: 389 S.
ISBN-10: 3-540-64798-8
ISBN-13: 978-3-540-64798-0
» In den Warenkorb
Processor Architecture
From Dataflow to Superscalar and Beyond
Preis: 69,50 Euro
Auflage: 1. Aufl.
Verlag: Springer-Verlag Berlin Heidelberg Berlin
Erscheinungsdatum: 06/1999
Seiten: 389 S.
ISBN-10: 3-540-64798-8
ISBN-13: 978-3-540-64798-0
» In den Warenkorb
Beschreibung
A survey of architectural mechanisms and implementation techniques for exploiting fine- and coarse-grained parallelism within microprocessors. Beginning with a review of past techniques, the monograph provides a comprehensive account of state-of-the-art techniques used in microprocessors, covering both the concepts involved and implementations in sample processors. The whole is rounded off with a thorough review of the research techniques that will lead to future microprocessors. XXXXXXX Neuer Text This monograph surveys architectural mechanisms and implementation techniques for exploiting fine-grained and coarse-grained parallelism within microprocessors. It presents a comprehensive account of state-of-the-art techniques used in microprocessors that covers both the concepts involved and possible implementations. The authors also provide application-oriented methods and a thorough review of the research techniques that will lead to the development of future processors.
Inhalt
Basic Pipelining and Simple RISC Processors.- Dataflow Processors.- CISC Processors.- Multiple-Issue Processors.- Future Processors to use Fine-Grain Parallelism.- Future Processors to use Coarse-Grain Parallelism.- Processor-in-Memory, Reconfigurable and Asynchronous Processors.- Acronyms.- Glossary.- References.- Index.